Adding CHIPSEC team to the thread:
On 10/18/2016 03:17 AM, Naresh Bhat wrote:
> Hi Ricardo,
> On 14 October 2016 at 00:19, Neri, Ricardo <ricardo.neri(a)intel.com> wrote:
>> On Tue, 2016-10-11 at 11:12 -0700, Blibbet wrote:
>>> Perhaps useful for Linaro's AArch64 port of LUV (since LUV includes
>>> CHIPSEC). I wish I could point you to source or more info on this
>>> apparent AArch64 port. I hope there is some communication
>>> going on between Linaro and this CHIPSEC porter.
>>> As I understand things, if all of the Intel-centric security tests are
>>> removed from CHIPSEC as part of ARM port, then some ARM security experts
>>> need to add some new ARM-centric security tests, else the ARM port may
>>> only be an empty test harness.
>>> Is there any status update on Linaro's AArch64 port of LUV?
>> Maybe Naresh knows? He is quite well connected with the Linaro folks ;)
> We have not yet started CHIPSEC porting on AArch64.
> Hi Lee, Can you please get more information ?
Can you clarify the ARM-based screenshot of CHIPSEC? Is this going to be
in a public release? Is this an internal project? How can the Linaro
team get a look at this code?