UEFI payload boot options not available in SBL
by avinok＠gmail.com
Hi
I've made a SBL build using UEFI payload from the edk2
The boot options from the SBL .dlt file are not making any changes, because UEFI start booting from the first available device
How can I create the boot option table using UEFI payload ?
Andrey
1 year, 9 months
FspMemoryInit hang all the time in APL build
by avinok＠gmail.com
Hi
I have a custom platform based LeafHill with customized memory settings.
The memory settings finalized, according to the board schematics.
Unfortunately, the boot is hanging on the FspMemoryInit all the time.
How can I understand why FspMemoryInit stuck. Can I make debugging inside ?
I've tried to use LEAFHILD.X64.0071.D01.1809040132.bin and LEAFHILD.X64.0071.R01.1809030849.bin to stitch, both have the same output
MMC is disconnected physically, an error in the output is ok
Output:
============= Intel Slim Bootloader STAGE1A =============
SBID: SB_APLI
ISVN: 001
IVER: 000.005.001.000.16526
SVER: 2A76A65FA31E58AC-dirty
FDBG: BLD(D) FSP(R)
FSPV: ID($APLFSP$) REV(01040301)
Loader global data @ 0xFEF01C40
Run STAGE1A @ 0xFEF80000
Load STAGE1B @ 0xFEF88000
No BtGuard verification !
============= Intel Slim Bootloader STAGE1B =============
CPU : APL-D0 [4C @ 1600MHz: premium SKU], uCode rev.2E
Early GpioInit for EMMC
MMC global data init
Use SDMA instead of ADMA2
MMC Phase 1 init
MmcGetOcr Fail Status = 0x80000007
Early MMC Init Fails @ 0xFE700000 - Status(Device Error)
SpiInstance = FEF03340
PchSpiBase at 0x00000D02
ScSpiBar0 at 0xD2000000
Append public key hash into store: Unsupported
Load EXT CFG Data @ 0xFEF03BE4:0x0DB4 ... Success
HASH verification for usage (0x00000200) with Hash Alg (0x1): Success
SignType (0x1) SignSize (0x100) SignHashAlg (0x1)
RSA verification for usage (0x00000200): Success
Initialize RTC with default values
BOOT: BP0
MODE: 0
BoardID: 0x02
PlatformName: SQX2
BootPolicy : 0x00000010
Memory Init
Looking for MRC saving data
MRC data NOT found
Load memory parameters from CfgData.
SQX2 Board: Makes extra Memory init configurations
Load general parameter from CfgData.
Call FspMemoryInit ...
Can someone help me to trace down what can be a problem ?
I can upload memory settings .dlt file if it can help
Andrey
1 year, 9 months
APL UART and PlatformID settings
by avinok＠gmail.com
Hi
I am trying to make SBL build and flash on the customized Apollo Lake platform
The platform uses Leaf Hill CRB, and I can make changes to set memory
However, the board would not detect Leaf Hill as 0x7, because pins are not connected
I am guessing the -p option would help me with a platform ID, right ?
Also, I have UART custom pins connected not the same as Leaf Hill, how can I configure this ? It is a bit of lack of documentation of the -p options
StitchLoader.py:
-p <value> : 4-byte platform data for platform ID and debug UART port index.
Can somebody help me with the UART configuration?
Andrey
1 year, 9 months