Set PCIe to -3.5db (LCTL2_LSTS2 bit 6)
by Andrey V
Hi
I am configuring as recommended in https://github.com/slimbootloader/slimbootloader/issues/680 the LCTL2_LSTS2 bit 6. The code in SBL has a comment like:
/* When the Link is operating at 5.0 GT/s speed, this bit
selects the level of de-emphasis
for an Upstream component.
1b:-3.5 dB 0b:-6 dB. 0:Disable, 1:Enable(Default). */
Therefore, adding the code in Stage2BoardInitLib.c like:
// Gen2 and -3.5db
FspsConfig->PcieRpSelectableDeemphasis[2] = 0x2;
FspsConfig->PcieRpSelectableDeemphasis [3] = 0x2;
FspsConfig->PcieRpSelectableDeemphasis[4] = 0x2;
FspsConfig->PcieRpSelectableDeemphasis[5] = 0x2;
I am expect the LCTL2_LSTS2 bit 6 is set.
However, the BIOS log after boot:
------------------ PCIe Config ------------------
RootPort[2] SelectableDeemphasis = 0
RootPort[3] SelectableDeemphasis = 0
RootPort[4] SelectableDeemphasis = 0
RootPort[5] SelectableDeemphasis = 0
How, can I verify the settings of the LCTL2_LSTS2 bit 6 ?
Andrey
2 years, 1 month