Please refer to the following spec for Intel Trace Hub (ITH) to get info about ITH
architecture in general and all the related configuration registers and their
I am only adding some description for you for those options that are not documented in the
1. RecoverDump - copy MTB internal buffer to MTB recovery RAM buffer according to the
Recovery buffer holds the data from previous boot for postmortem analysis.
2. PunitMlvl - Configure Message verbosity level from PUNIT code, only if DEBUGGER IN
USE bit is not set (0-least, 4-max messages)
3. PmcMlvl - Set PMC verbosity level (0-least, 4-max messages)
If you are trying to get traces from SBL, you need to follow the procedure given in
Chapter 13 in the spec copied above.
Please use NpkEn = 1/2 for tracing/debugging. You can either use Fw or Sw, but preferably
FwTrace for your traces.
For DCI.USB3 debugging, you don't need memory on target. Both MSC0/1 will act as trace
buffer input to be DMAed to DCI interface. (Section 188.8.131.52 in the spec)
For FwTrace vs SwTrace, please read section 4.1.2.
Please let us know if you need any more info about enabling ITH for debug/traces.
From: Talamudupula, Sai Kiran
Sent: Monday, February 3, 2020 5:13 PM
To: joe.bak(a)ametek.com; sbl-devel(a)lists.01.org
Subject: RE: [Sbl-devel] Using Intel Trace Hub (North Peak) with Slim Bootloader
I am collecting some information for you about all those settings under NPK configuration.
Will send an update here soon.
From: joe.bak(a)ametek.com [mailto:firstname.lastname@example.org]
Sent: Friday, January 31, 2020 10:27 PM
Subject: [Sbl-devel] Using Intel Trace Hub (North Peak) with Slim Bootloader
I am reviewing the settings in Slim Bootloader related to Debug and Trace and I can find
very little information beyond the terse descriptions in the two FSP header files:
FspmUpd.h and FspsUpd.h. Can someone point me to a document that explains the effects of
the following parameters in greater detail?
I intend to use Intel Trace Hub over a USB3/DCI interface, so I think that I need the
NpkEn = 2 /* Debugger */
FwTraceEn = 1 /* Enable */
FwTraceDestination = 2 /* NPK_TRACE_TO_DCI */ PtiMode = 0 /* Off */
Will DCI trace require memory on the target (Msc0/Msc1)?
What is the difference between FwTrace and SwTrace?
I already have the Intel System Studio Debugger working with USB3/DCI on the target board,
but could use some help with Intel Trace Hub.
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